This notes sheet looks at the basics of logic & binary code, including logic gates, logic networks, bolean identities, sequential logic, switches and grey code.

Binary

Transistors make up the majority of computing, but they can only exist in two states: on and off.
Therefore, we need a system of passing information in zeros and ones only – binary.

Starting from right to left, the value of each digit (bit) increases in powers of two:

binary code, how binary works, logic binary, 010101

For example, the number 1101 represents:

    \[1(2^3)+1(2^2)+0(2^1)+1(2^0\]

    \[1(8)+1(4)+0(2)+1(1)\]

    \[8+4+0+1=13\]

When converting a decimal number, N, to binary, you need to know how many bits, M, you will need:

    \[M=\log_2 N\]

A byte is unit of data expressed as a binary number.

The byte above (1101) is 4-bit and represents the decimal number 13 (decimal meaning base 10,
out normal counting system, as opposed to binary).

Logic Gates

A logic gate is a series of transistors that that change binary inputs into (sometimes) different
binary outputs.

A truth table is used to represent the output of a gate for each possible set of inputs.

Boolean algebra is used to express a series of logic operations compactly. Generally, M represents
the output.

NOT Gate

    \[M=\overline A\]

AM
01
10

AND Gate

    \[M=A \cdot B\]

AND Gate
ABM
000
010
100
111

OR Gate

    \[M=A+B\]

OR Gate
ABM
000
011
101
111

NAND Gate

    \[M=\overline{A\cdot B}\]

NAND Gate
ABM
001
011
101
110

NOR Gate

    \[M=\overline{A+B}\]

NOR Gate
ABM
001
010
100
110

XOR Gate

    \[M=A\oplus B\]

XOR Gate
ABM
000
011
101
110

Boolean Identities

There are a number of important identities that can be sued to simplify logic networks:

    \[A+B=\overline{(\overline A \cdot \overline B)}\]

    \[\overline{A+B}=(\overline A \cdot \overline B)\]

    \[A+\overline A = 1\]

    \[A\cdot \overline A=0\]

Sequential Logic

S-R Latch

A latch is a logic network with two inputs, set (S) and reset (R):

S-R latch, logic latch,

The outputs are Q and NOT Q. This means there is one row in the truth table that is illegal, as they
cannot both be 1:

SRQNOT Q
0010
0001
0101
0010
1111

The last row is illegal.

Note that there are two possibilities where both S and R are zero. This allows the latch to store
memory
, as when both inputs return to zero, the latch will stay wherever it was before (1 or 0),
until another action happens.

Clocked Latches

An S-R latch can be connected to a clock – a signal that regularly alternates between 1 and 0 at
a fixed interval. This means that the inputs are gated and can only reach the latch when the clock
(Ck) equals 1.

clocked s-r latch, clocked logic latch

This can be used to count elapsed time, but generally it is used to ensure that multiple actions
happen simultaneously.

rising edge vs falling edge, clocked s-r latch, clocked logic latch

The latch can be set up in such a way that the inputs reach the latch either when the clock pulse
goes from 0 to 1 (rising edge) or when it goes from 0 down to 1 (falling edge).

Toggle Flip-Flop

A toggle flip-flop is a clocked S-R latch without S and R inputs. Instead, the only input is the clock,
Ck, and so the outputs Q and NOT Q switch values whenever a pulse is applied at the clock input.

These are used to count time and binary.

Switches

Switches have poles and throws. They could have any number of each of these, leading to a vast
number of switches being available:

types of switches, logic switches, electronic switches

Pull-Up Switch

To generate a logic output from a switch, a pull-up resistor needs to be incorporated to minimise
the time delay:

  • When the switch is open, the input voltage flows through the resistor to the output (only very small amount of power is lost).
  • When the switch is closed, the circuit is shorted, and the output voltage is zero.
pull-up switch, pull=up logic switch, logic switch

Switch Bounce

Logic outputs are very time-sensitive, and so the tiny bounces of the switch when it is operated
can screw up the system. Therefore, a switch debouncer is required so that the logic network
ignores any repeat inputs:

switch debouncer, switch debouncer logic network

A switch with a built in debouncer is known as ‘TTL Compatible’, as they are ready for use
with TTL (logic) gates.

Grey Code

Grey code is an alternative way of counting binary in which only one bit changes value at a time.
This is generally used to avoid errors in transmission – if more than one bit changes at once you
know something is wrong – but it is sometimes used for constructing logic networks.

DecimalBinaryDecimalGreycode
00000000
10011001
20103011
30112010
41006110
51017111
61105101
71114100

This may seem confusing, but is a key step in using Karnaugh Maps to produce simplified logic networks.

  • The key boolean identities are:
    • A+B=\overline{\overline A \cdot \overline B}
    • \overline{A+B}=(\overline A \cdot \overline B)
  • An S-R latch is used to store data – this can be clocked to count time or binary
  • Greycode is binary but in a different order: only one byte changes every time.